SoC DRAM Memory Subsystem Validation Engineering Program Manager
Apple · Cupertino, California, United States
Computers and Electronics Manufacturing · 10,001+ employees
About the role
The Program Manager will drive the readiness, bring-up, and validation of custom SoC memory subsystems. They will act as the primary interface between architecture, design, and software teams to ensure high-quality delivery from development to mass production.
What they look for
Requirements
Candidates must have a Bachelor's degree and at least 10 years of relevant experience in SoC DRAM memory design, validation, or architecture. Strong leadership, debugging skills, and the ability to manage complex technical projects under pressure are required.
Full description
Come and join the team that crafts Apple's groundbreaking silicon. Apple makes the greatest SoCs in the world; to do that takes thousands of employees, multiple years and very significant R&D spending. To make the best use of those employees, time, and money requires excellent methodologies and structures. As we continue to expand and mature, the processes used to develop these SOCs must be improved. Join us to do your life’s best work in this rare opportunity to help define the next big thing that will surprise and delight the world!
Description
The SoC DRAM Memory Subsystem Validation and Debug Program Manager will drive the memory subsystem readiness for our custom SoCs. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. The charter will include managing bring-up, validation and the complicated debug of our groundbreaking memory subsystem. The EPM will also help craft the DRAM industry’s mobile roadmap and drive innovative DRAM technologies to accompany SoC’s across Apple’s product lines. In this multifaceted role, you will be the critical interface between Apple’s DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams to ensure these sophisticated memory technologies are delivered from architecture to mass production to Apple’s industry leading quality standards.
Minimum Qualifications
BS + 10 years of relevant experience Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering.
Preferred Qualifications
Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR controller, PHY design and high-speed IO interface, DRAM device, and associated calibration/training mechanisms. Experience shipping high volume DRAMs / SoCs. Previous experience working with major DRAM memory vendors and validation of DRAM device is also a plus. Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management. Excellent debugging skills. Proven track record to drive resolution of critical problems, while under pressure. Ability to understand complex technical discussions and extract action plans. Passionate to own/drive project development using well-defined metrics. Thrives in dynamic schedule driven development environment. Ability to succinctly summarize complex details for executive reporting. Extraordinary leadership skills and ability to encourage team members with a dedication to see the bigger picture Phenomenal leadership and social skills with a reciprocal approach.
